This thesis presents the simulation and the design of vertical interconnects in silicon substrates known as through silicon vias (TSVs) which are applied as a component of 3D integration of integrated circuits. Numerical methods of comparably high efficiency are developed and applied in order to simulate the electromagnetic properties of large realistic arrays of TSVs. The proposed methods are correlated with alternative methods and parameter variations are carried out to derive design guidelines. Further, several test structures with TSVs are developed and the measurement results are correlated with the results from electromagnetic simulations.
