Feature localization and design understanding for hardware designs

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The complexity of modern chips is rapidly increasing. To fulfill tight time-to-market constraints, more and more blocks from previous designs are reused or third party IP blocks are licensed. However, such blocks are often poorly documented, making adjustments to the blocks a difficult task. This thesis researches techniques to automatically infer information of a block's internal design, which helps a developer during improving, extending, and debugging the design. The techniques considered in this work include feature localization, debugging, and automatically connecting design blocks. Feature localization is an approach to automatically find the code implementing a given functional feature. Three different basic techniques for feature localization are considered: One based on coverage metrics, one based on the analysis of the dynamic dataflow within the design, and one based on mutation testing. The considered debugging techniques are based on dynamic dataflow of the design and help the developer to find the parts of the correct responsible for incorrect behavior. The automatic connection heuristically computes likely ports to be connected, based on the port-width, port-direction, and port-name.